Slides are now available here
Partitioned Global Address Space (PGAS) programming models offer a shared address space model that simplifies programming while exposing data/thread locality to enhance performance. This facilitates the development of programming models that can deliver both productivity and performance. The PGAS conference is the premier forum to present and discuss ideas and research developments in the area of: PGAS models, languages, compilers, runtimes, applications and tools, PGAS architectures and hardware features.
Papers and posters are solicited in related areas, including but not limited to:
- Architectures. System Architectures, Networks, and Memory Architectures designed to enhance and enable PGAS programming models.
- Applications. New applications that are uniquely enabled by the PGAS model, existing applications and effective application development practices for PGAS codes.
- Performance. Analysis of application performance over various programming models.
- Developments in Programming Models and Languages. PGAS models, language extensions, and hybrid models to address emerging architectures, such as multicore, hybrid, heterogeneous, SIMD and reconfigurable architectures.
- Tools, Compilers, and Implementations. Integrated Development Environments, performance analysis tools and debuggers. Compiler optimizations for PGAS languages, low level libraries, memory consistency models. Hardware support for PGAS languages, performance studies and insights, productivity studies, and language interoperability.
The PGAS Programming Models Conference is dedicated to the presentation and discussion of research work in this field. Papers should report on original research, and should include enough background material to make them accessible to the entire PGAS research community. Papers describing experiences should indicate how they illustrate general principles; papers about parallel programming foundations should indicate how they relate to practice.